Recently, with the rapid development of augmented reality (AR) display and virtual reality (VR) display, development of ultra-high PPI (which is equal to or greater than 1000 PPI) backplate technology is gradually becoming a mainstream direction. Oxide materials have been the main materials selected for backplates due to their excellent performance and simple fabrication process. However, oxide thin film transistors (TFTs) of back channel etch type and oxide thin film transistors of top gate type have large sizes and thus are not suitable for ultra-high PPI oxide array substrates. TFTs of vertical structure of oxide array substrates have sizes smaller than those of the oxide thin film transistors of back channel etch type and the oxide thin film transistors of top gate type, and have good TFT characteristic, thus, the oxide TFT of vertical structure has a good application prospects in ultra-high PPI backplates.
However, one method for manufacturing the TFTs of vertical structure of oxide array substrates generally includes at least four times of mask processes, i.e., four times of patterning processes, which makes the production process more cumbersome.